The design rules of antistatic release (ESD) must be followed in electronic product design, because most of the electronic products are in an ESD environment for 99% of the life cycle, and ESD interference can cause the device to lock, reset, lose data or decrease the reliability. This article introduces engineers to master the skills of ESD protection and improve the reliability of electronic products.

In the destruction of ESD, static electricity will cause devastating damage to the I/O port, which may cause data bit shadow, product damage until it causes "hard failure" or damage to the components of the electronic device. So engineers need to consider the ESD problem in design and master the solution.

Shanghai Lei Mao electronics believes that more and more low power logic chips are used in portable products at present. These logic chips are very sensitive to ESD because of the dielectric breakdown of metal oxide semiconductor (MOS) and the restriction of bipolar reverse junction current. IC chips that control I/O ports (USB ports, Ethernet ports, etc.) are no exception, because most of them are designed and manufactured on the basis of CMOS technology, which causes the IC chip to be very sensitive to the damage caused by ESD. In addition, most I/O ports (especially USB ports) are hot swap systems, and are vulnerable to ESD impacts caused by users or air discharges. It can be seen that ESD protection is very necessary in today's portable and USB applications. Shanghai Lei Mao electronics has proposed a solution for USB applications.

Some engineers questioned the protective effect of TVS devices in the T1/E1 interface design. Shanghai ray electronics believed that adding TVS devices on the power line helped to solve the ESD problem from the power port, and stressed that TVS was connected to the Vcc and ground of the power supply to prevent ESD interference from the power supply.

In response to the questions raised by the engineer on the comprehensive consideration of ESD protection, Shanghai Lei Mao electronics believed that the comprehensive consideration of ESD protection should start from three aspects: 1, the ESD capacity of the chip; 2, PCB layout design; 3, mechanical design. He said that good PCB layout design should maximize the grounding area and shorten the PCB line. He emphasized that TVS array can effectively solve the ESD problem.

In view of the common mode interference caused by ESD, Shanghai ray electron points out that common mode choke or TVS array can usually be used to solve the ESD problem and complete EMI filtering. In the circuit, the CCP is connected in serial, and TVS is connected to the circuit in parallel. Apart from solving the ESD problem with devices, we can also follow some basic rules to solve the ESD problem of PCB:

1. As far as the possible use of multi-layer PCB is concerned with the double-sided PCB, the ground plane and the power supply plane and the close signal line spacing can reduce the common mode impedance (common impedance) and the perceptual coupling, so as to achieve the 1/10 to 1/100 of the double-sided PCB.

2, try to keep each signal layer close to a power supply or ground layer. For the top and bottom surfaces, there are components, short wires, and many high density PCB that can be filled. The inner layer can be considered. Most of the signal lines and power and ground planes are on the inner layer, which is similar to the Faraday box with shielding function.

3, for double sided PCB, closely interconnected power and ground grids should be used. The usual solution is to solve problems by testing - retesting such cycles, and each cycle may affect at least one piece of PCB design. In the PCB design process, most of the design modifications can be limited to components or components.